An important property for semiconductor devices used in power applications is thermal resistance, which is a property of a material that is associated with heat conductivity. For example, a material with a high thermal resistance is not a good conductor of heat, whereas a material with a low thermal resistance will conduct heat relatively well. The thermal resistance of certain regions within a semiconductor device will directly determine the maximum heat dissipation of the semiconductor device for a given junction temperature rating. Consequently, it is desirable to minimize the thermal resistance of certain locations within a semiconductor device in order to dissipate heat.
FIG. 1A is a cross-sectional view of a prior art gallium nitride (GaN) high electron mobility transistor (HEMT) 10 depicting a buffer layer 12 between GaN device layers 14 and a semi-insulating substrate 16. The buffer layer 12 and the GaN device layers 14 make up epitaxial layers 18. A source electrode 20, a gate electrode 22 and a drain electrode 24 are disposed onto a surface 26 of the epitaxial layers 18. Heat dissipated in the GaN HEMT 10 must flow through the epitaxial layers 18 to reach the semi-insulating substrate 16, which is selected of a material that provides a relatively low thermal resistivity. For example, the bulk thermal conductivity of GaN is 1.3 W/cm·K compared to a thermal conductivity of around about 3.6 W/cm·K to around about 4.9 W/cm·K for various silicon carbide (SiC) polytypes. Therefore, SiC is a desirable material for the semi-insulating substrate 16. However, due to a lattice mismatch between GaN and common substrates such as SiC, silicon (Si), and Sapphire, a GaN nucleation along with the buffer layer 12 have a high dislocation density, which significantly increases the thermal resistivity of the epitaxial layers 18.
FIG. 1B is a plan view of the prior art GaN HEMT 10 depicting through-wafer vias 28 that are electrically coupled to a bus 30 of the source electrode 20 near the periphery of a die 32. The location of the through-wafer vias 28 prevents the through-wafer vias 28 from efficiently dissipating the heat generated by the GaN HEMT 10 because the largest heat density occurs within a central region of the die 32 in close proximity to drain fingers 34 that are interdigitated with source fingers 36, and gate fingers 38. As a result, there remains a need for a semiconductor device having a structure that dissipates heat with a relatively greater efficiency.